http://www.wbd101.com
make sure to watch the video shot at ces
Introduction
Well Being Digital (WBD101) is a Hong Kong based company that aims to enable affordable & accurate underlying technologies for mHealth/wearable devices. We have successfully implemented our algorithms onto Infra-red sensors, accelerometer and gyroscope, we experienced in supporting productization and commercialization for Fortune 500 customers (Parrot, Philips, Motorola, Haier America, New Balance, etc.) We target to help brand owners add value to their wearables / hearables / sensorhubs. If you are looking for earphones factories that uses our technology, we can introduce you to Foxlink, TaiSing Industries or Awei. Please contact sales@wbd101.com You can read about ActivHearts™ at http://www.wbd101.com/#a4, https://www.facebook.com/ActivHearts or http://t.qq.com/WBD1014825
Product
Whether you are designing wearables or hearables, we provide sensing algorithms and hardware reference design to help you, including heart rate sensing and motion sensing. Our technology is probably the lowest power consuming, the smallest in mechanical requirements and the lowest cost and it is certainly 3rd party apps compatible, including Polar Beat™, Runkeeper™, MiCoach™, Wahoo Utility™, Runtastic™ and any apps that is compatible to the Bluetooth Smart Heart Rate Profile (HRP). Bluetooth Smart has been enabled starting in iPhone 4S, Android 4.3 and Windows 8 GDR3.
Contact Person
Mr. Mr. Kow
Saturday, January 27, 2018
The adjacent possible has a new name/names and some new geography,
A Valencel sort of company?
lets see
Hong Kong Startup Well Being Digital (WBD101) is One of only Ten Startup Worldwide to be Selected for GIN goAustria Programme
With almost 50 patents and technologies like ActivHearts (heart rate sensing) and Mogo (motion sensing), WBD101 is probably the only Asian startup with in-depth in-house expertise on SmartBody sensing technology + Mobile AI.
Google +0 6 7 54 0
WBD101 has developed extremely accurate heart rate measurement technology. We hope that the accelerator program will allow them to explore the advantages of Austria as an IoT hub in Europe.
HONG KONG, October 02, 2017 /24-7PressRelease/ -- Republic of Austria, home to just 8.7 million people in Central Europe, is also home to many Multi-National Corporations such as Austria Micro AMS, Palfinger, Red Bull and Swarovski. Austria is where acid resistant penicillin was discovered so that it could be administered orally and the country is within 3 hours by air to all of Europe, which makes it an ideal place to become the IoT Centre of Europe.
"We are also happy to announce that Hong Kong startup Well Being Digital was selected to explore the Austrian startup scene with a participation in the GIN goAustria Programme, all expenses paid. WBD101 has developed extremely accurate heart rate measurement technology that can be applied to earphones and wrist watches. We hope that their participation in the accelerator program GIN goAustria will allow them to explore the advantages of Austria as an IoT hub in Europe," says Franz Roessler, Austrian Trade Commissioner in Hong Kong. "Well Being Digital is the only Hong Kong company to represent Hong Kong and all of China in the Austrian government's incubator programme "goAustria". The programme enables participants to get acquainted to the Austrian and European markets. The programme consists of briefings, site visits, and one-to-one work with a mentor and public presentations in front of possible clients, investors and other Austrian partners."
With almost 50 patents in the SmartBody Sensing area, WBD101's technology recently enabled products like JBL Reflect Fit and Skytech's FTL-E08 to offer very accurate sensing capabilities for the consumers that they target.
"We are very excited to be the only Hong Kong company to participate in this world renowned accelerator program that is sponsored by the Austrian Ministry of Science, Research and Economy," says Kow Ping, Co-Founder of WBD101. "With our wealth of patents and technology in SmartBody Sensing, WBD101 hopes to collaborate with Austrian startups and multinationals to develop smart devices to solve healthcare issues that are affecting lifestyles around the world."
WBD101's international award winning ActivHearts heart rate sensing technology has been applied to both sports and fitness devices like the JBL Reflect Fit, as well as in healthcare devices like the Hera Leto One (World's First AI-Assisted Earphones for 15 mins Power Walk and 10 mins Stress Relieving Playlist).
Founded in 2012, Well Being Digital Limited (WBD101) is a Hong Kong based company whose first patents are dated back to 2008, incubated by the Hong Kong Science and Technology Park (HKSTP) it has offices in HKSTP and Shenzhen so as to provide very timely support to B2B customers during their design, tests and production stages. WBD101 focuses on very elaborate SmartBody Sensing Technology. Besides ActivHearts, it has highly accurate motion sensing technology (Mogo). Over the years, WBD101 won numerous international awards including the Best Wearable Mobile Tech Awards at the Mobile World Congress 2016, Special & Gold Awards at the 43rd Geneva Inventions Conventions and 2016 WITSA Global ICT Award.
The Austrian Trade Commission in Hong Kong covers the special administrative regions of Hong Kong and Macau as well as the provinces of Guangdong, Guangxi Zhuang, Guizhou, Hainan, Hunan and Yunnan and the Philippines. In Guangzhou, ADVANTAGE AUSTRIA maintains a branch office (Austrian Consulate General - Commercial Section). Helmed by Commissioner Franz Roessler, the Austrian Trade Commission has been exploring business opportunities and providing services to Austrian companies in the region.
Just maybe we have more things to read with QUIK and WBD101.
The "adjacent possible" says it will happen. :-)
A Valencel sort of company?
lets see
Hong Kong Startup Well Being Digital (WBD101) is One of only Ten Startup Worldwide to be Selected for GIN goAustria Programme
With almost 50 patents and technologies like ActivHearts (heart rate sensing) and Mogo (motion sensing), WBD101 is probably the only Asian startup with in-depth in-house expertise on SmartBody sensing technology + Mobile AI.
Google +0 6 7 54 0
WBD101 has developed extremely accurate heart rate measurement technology. We hope that the accelerator program will allow them to explore the advantages of Austria as an IoT hub in Europe.
HONG KONG, October 02, 2017 /24-7PressRelease/ -- Republic of Austria, home to just 8.7 million people in Central Europe, is also home to many Multi-National Corporations such as Austria Micro AMS, Palfinger, Red Bull and Swarovski. Austria is where acid resistant penicillin was discovered so that it could be administered orally and the country is within 3 hours by air to all of Europe, which makes it an ideal place to become the IoT Centre of Europe.
"We are also happy to announce that Hong Kong startup Well Being Digital was selected to explore the Austrian startup scene with a participation in the GIN goAustria Programme, all expenses paid. WBD101 has developed extremely accurate heart rate measurement technology that can be applied to earphones and wrist watches. We hope that their participation in the accelerator program GIN goAustria will allow them to explore the advantages of Austria as an IoT hub in Europe," says Franz Roessler, Austrian Trade Commissioner in Hong Kong. "Well Being Digital is the only Hong Kong company to represent Hong Kong and all of China in the Austrian government's incubator programme "goAustria". The programme enables participants to get acquainted to the Austrian and European markets. The programme consists of briefings, site visits, and one-to-one work with a mentor and public presentations in front of possible clients, investors and other Austrian partners."
With almost 50 patents in the SmartBody Sensing area, WBD101's technology recently enabled products like JBL Reflect Fit and Skytech's FTL-E08 to offer very accurate sensing capabilities for the consumers that they target.
"We are very excited to be the only Hong Kong company to participate in this world renowned accelerator program that is sponsored by the Austrian Ministry of Science, Research and Economy," says Kow Ping, Co-Founder of WBD101. "With our wealth of patents and technology in SmartBody Sensing, WBD101 hopes to collaborate with Austrian startups and multinationals to develop smart devices to solve healthcare issues that are affecting lifestyles around the world."
WBD101's international award winning ActivHearts heart rate sensing technology has been applied to both sports and fitness devices like the JBL Reflect Fit, as well as in healthcare devices like the Hera Leto One (World's First AI-Assisted Earphones for 15 mins Power Walk and 10 mins Stress Relieving Playlist).
Founded in 2012, Well Being Digital Limited (WBD101) is a Hong Kong based company whose first patents are dated back to 2008, incubated by the Hong Kong Science and Technology Park (HKSTP) it has offices in HKSTP and Shenzhen so as to provide very timely support to B2B customers during their design, tests and production stages. WBD101 focuses on very elaborate SmartBody Sensing Technology. Besides ActivHearts, it has highly accurate motion sensing technology (Mogo). Over the years, WBD101 won numerous international awards including the Best Wearable Mobile Tech Awards at the Mobile World Congress 2016, Special & Gold Awards at the 43rd Geneva Inventions Conventions and 2016 WITSA Global ICT Award.
The Austrian Trade Commission in Hong Kong covers the special administrative regions of Hong Kong and Macau as well as the provinces of Guangdong, Guangxi Zhuang, Guizhou, Hainan, Hunan and Yunnan and the Philippines. In Guangzhou, ADVANTAGE AUSTRIA maintains a branch office (Austrian Consulate General - Commercial Section). Helmed by Commissioner Franz Roessler, the Austrian Trade Commission has been exploring business opportunities and providing services to Austrian companies in the region.
Just maybe we have more things to read with QUIK and WBD101.
The "adjacent possible" says it will happen. :-)
Have some fun...
this snip is from the QUIK blog....
It is from a company called “Cleer, Inc.” for a product they call the Edge Voice headphone. This product allows customers using it to connect to Amazon’s Alexa voice services via Bluetooth technology to make calls, stream audio, order products, or check schedules and set reminders. As a bonus feature, it also includes built-in heart-rate monitoring.
So who's Heart rate algos are in this device?
Must be Valencel?
Nope.
"We are very honoured and excited to enable Cleer EDGE Voice and EDGE Pulse with ActivHearts," says Mr. Kow Ping, CEO of WBD101. "Our ActivHearts technology is a highly accurate heart rate sensing technology that is mechanically extremely small and comfortable, the only technology out there to allow our customers to have very elegant product designs with our sensors well hidden."
So, the heart rate IS NOT Valencel in the Cleer device we are in.
I like it better this way.
WBD101's technology has been adopted by customers such as JBL Reflect Fit, Pioneer SEC-S801BT and Hera Leto ONE, besides the Cleer EDGE Voice and EDGE Pulse.
Is it any good?
back in '16
Well Being Digital Wins The Best Wearable Mobile Technology Award at GSMA Mobile World Congress
"Winning The Best Wearable Mobile Technology Award marks a remarkable milestone in our venture", said Wallace Wong, CTO & Founder of Well Being Digital Ltd and a graduate from The Engineering School of Hong Kong University of Science and Technology where his research and development journey started.
Nice QUIK, its a new name for Heart rate and other algos, can you do more and more with these guys?
Oh, you already are? tnks.
this snip is from the QUIK blog....
It is from a company called “Cleer, Inc.” for a product they call the Edge Voice headphone. This product allows customers using it to connect to Amazon’s Alexa voice services via Bluetooth technology to make calls, stream audio, order products, or check schedules and set reminders. As a bonus feature, it also includes built-in heart-rate monitoring.
So who's Heart rate algos are in this device?
Must be Valencel?
Nope.
"We are very honoured and excited to enable Cleer EDGE Voice and EDGE Pulse with ActivHearts," says Mr. Kow Ping, CEO of WBD101. "Our ActivHearts technology is a highly accurate heart rate sensing technology that is mechanically extremely small and comfortable, the only technology out there to allow our customers to have very elegant product designs with our sensors well hidden."
So, the heart rate IS NOT Valencel in the Cleer device we are in.
I like it better this way.
WBD101's technology has been adopted by customers such as JBL Reflect Fit, Pioneer SEC-S801BT and Hera Leto ONE, besides the Cleer EDGE Voice and EDGE Pulse.
Is it any good?
back in '16
Well Being Digital Wins The Best Wearable Mobile Technology Award at GSMA Mobile World Congress
"Winning The Best Wearable Mobile Technology Award marks a remarkable milestone in our venture", said Wallace Wong, CTO & Founder of Well Being Digital Ltd and a graduate from The Engineering School of Hong Kong University of Science and Technology where his research and development journey started.
Nice QUIK, its a new name for Heart rate and other algos, can you do more and more with these guys?
Oh, you already are? tnks.
Friday, January 26, 2018
a distillation post for those pressed for time....
Acronyx
As a result CPUs are quickly being left behind in being able to address today’s compute requirements.
From CES and Brian F. in China. I will rewrite it....
MCUs are quickly being left behind in being able to address today’s compute requirements.
The companies who were offering embedded FPGA IP for ASIC design had minimal tools at best, and most chip design teams were highly reluctant to give up a bunch of silicon real estate on their device for something that might or might not be useful.
those eFPGA software tools jobs are a great allocation of precious $$. thnks QUIK.
the margin, between the voice as part of the trinity and the value of the eFPGA IP........
and finally for those worried bout competition.....
these companies cannot really be considered “competitors” with each other because each one (at this point) seems to be focusing on a particular market segment or application area. It would be surprising if there were many situations where a design team was evaluating more than one of these for a particular project.
hence the difference in nodes and process...
We are on the right one 22FDX, there is a reason we were picked, they just go well together. They would NOT want anybody else.
Acronyx
As a result CPUs are quickly being left behind in being able to address today’s compute requirements.
From CES and Brian F. in China. I will rewrite it....
MCUs are quickly being left behind in being able to address today’s compute requirements.
The companies who were offering embedded FPGA IP for ASIC design had minimal tools at best, and most chip design teams were highly reluctant to give up a bunch of silicon real estate on their device for something that might or might not be useful.
those eFPGA software tools jobs are a great allocation of precious $$. thnks QUIK.
the margin, between the voice as part of the trinity and the value of the eFPGA IP........
and finally for those worried bout competition.....
these companies cannot really be considered “competitors” with each other because each one (at this point) seems to be focusing on a particular market segment or application area. It would be surprising if there were many situations where a design team was evaluating more than one of these for a particular project.
hence the difference in nodes and process...
We are on the right one 22FDX, there is a reason we were picked, they just go well together. They would NOT want anybody else.
with the FAQ...we (currently) do NOT compete with these guys.
But some of what they say is true for ALL of the players.....
Next-Generation AI Hardware needs to be Flexible and Programmable
Achronix Semiconductor Corp>>Blogs>>Next-Generation AI Hardware needs to be Flexible and Programmable
Steve Mensor, Vice President, Marketing
January 19, 2018
Artificial intelligence (AI) is reshaping the way the world works, opening up countless opportunities in commercial and industrial systems. Applications span diverse markets such as autonomous driving, medical diagnostics, home appliances, industrial automation, adaptive websites and financial analytics. Even the communications infrastructure linking these systems together is moving towards automated self-repair and optimization. These new architectures will perform functions such as load balancing and allocating resources such as wireless channels and network ports based on predictions learned from experience.
These applications demand high performance and, in many cases, low latency to respond successfully to real-time changes in conditions and demands. They also require power consumption to be as low as possible, rendering unusable, solutions that underpin machine-learning in cloud servers where power and cooling are plentiful. A further requirement is for these embedded systems to be always on and ready to respond even in the absence of a network connection to the cloud. This combination of factors calls for a change in the way that hardware is designed.
Let’s look at some of the main classes of hardware devices typically used to carry out such computing tasks and analyze the trade-offs associated with each of them:
CPUs
CPUs are about as flexible as a device can be, intended to be a completely general-purpose device. They’re also easy to program. However, this flexibility naturally comes at a cost. The large overhead involved in moving data and instructions around a general-purpose architecture makes CPUs relatively inefficient and power-hungry. As a result CPUs are quickly being left behind in being able to address today’s compute requirements.
From CES and Brian F. in China. I will rewrite it....
MCUs are quickly being left behind in being able to address today’s compute requirements.
Designers have therefore chosen to look at other architectures to supplement this generalized functionality.
GPUs
Another route, depending on the task required, is to look at a graphics processing unit (GPU) to solve the problem. GPUs came into their own from the 90s onwards, where they were generally used to aid CPUs in PCs with graphical processing tasks (for which they are architecturally optimized). In fact, GPUs, with their many compute cores and ‘seas of ALUs’, can be used to accelerate many different types of highly parallelized functions. However, the trade-off is an inability to perform generalist compute tasks along with being relatively power-hungry.
ASICs
At the furthest end of the solution spectrum are ASICs. Manufactured specifically to support their target application, ASICs can be designed to waste zero time or energy on anything else. However, the design and manufacturing of an ASIC, as most designers will attest, is expensive, involves high commitment to a limited number of functions, and offers almost no capacity for more generalized compute or adaptation for other uses after the fact.
A huge proportion of our customers are already at this stage — designing high-performance ASICs (as the only means of addressing the intense compute requirements they face). Yet even here, many of the customers that speak to us are already having to think about alternate approaches that might allow them to produce higher-performing devices at a lower overall cost, as well as integrating a degree of functional flexibility.
So what are the alternatives?
FPGAs
There is another way. FPGAs can offer flexibility close to that of a CPU with the efficiency approaching that of an ASIC. Like ASICs, FPGAs allow the designer to implement the algorithm in logic, delivering huge parallelism and a hardware-optimized solution. Unlike ASICs, FPGAs can be reprogrammed with a new design in the blink of an eye. Compared to CPUs or GPUs, today’s FPGAs are extremely power efficient, able to provide many more operations per watt than processor-based solutions.
But there is an even more attractive solution.
Speedcore eFPGA IP
Achronix has taken things a step further. Rather than simply advocating the use of a discrete FPGA, why not bring that architecture on-board your CPU or SoC and still enjoy further increase in performance?
An eFPGA removes the need to communicate chip-to-chip through bandwidth-limited connections such as PCI-Express and the need for data to be serialized and de-serialized, plus provides an extremely large number of on-chip interconnects to the FPGA fabric — resulting in higher SoC system performance, lower power, reduced die size and overall lower system cost compared to discrete-chip FPGAs.
Achronix’s Speedcore™ eFPGA IP can be integration into ASICs and SoCs to provide a customized programmable fabric. Customers specify their logic, memory and DSP resource needs, then Achronix configures the Speedcore IP to meet their individual requirements. Speedcore look-up-tables (LUTs), RAM blocks and DSP64 blocks can be assembled like building blocks to create the optimal programmable fabric for any given application. Speedcore eFGPAs are currently in production on TSMC’s 16nm process (and in development on TSMC 7nm). Speedcore eFPGAs are supported by the silicon-proven Achronix ACE design tools.
On top of several other benefits, a Speedcore eFPGA solution can offer cache-coherency, share memory resources for faster load-in and load-out, and can reconfigure its entire architecture within 2ms per 100,000 lookup tables.
Existing solutions such as multi-core CPUs, GPGPU and standalone FPGAs can be used to support advanced AI algorithms such as deep learning, but they are poorly positioned to handle the increased demands developers are placing on hardware as their machine-learning architectures evolve. The Achronix Speedcore eFPGA is based upon proven technology and can offer designers a route to faster, smaller, cheaper and more power-efficient solutions, allowing designers to continue to increase their compute in line with rapidly-escalating market requirements.
Commentry: Make sure to read the Kevin Morris item also.
1. precious QUIK $$ resources are being spent for a dedicated eFPGA software tools team. They will stay on it and improve the tools real time.
Nice.
2. This article separate the eFPGA players; Achronyx and QUIK do NOT compete at this time. That shows in the fact that we are on 22FDX and they are on Finfet.
BUT much of the reasons why are THE SAME.
But some of what they say is true for ALL of the players.....
Next-Generation AI Hardware needs to be Flexible and Programmable
Achronix Semiconductor Corp>>Blogs>>Next-Generation AI Hardware needs to be Flexible and Programmable
Steve Mensor, Vice President, Marketing
January 19, 2018
Artificial intelligence (AI) is reshaping the way the world works, opening up countless opportunities in commercial and industrial systems. Applications span diverse markets such as autonomous driving, medical diagnostics, home appliances, industrial automation, adaptive websites and financial analytics. Even the communications infrastructure linking these systems together is moving towards automated self-repair and optimization. These new architectures will perform functions such as load balancing and allocating resources such as wireless channels and network ports based on predictions learned from experience.
These applications demand high performance and, in many cases, low latency to respond successfully to real-time changes in conditions and demands. They also require power consumption to be as low as possible, rendering unusable, solutions that underpin machine-learning in cloud servers where power and cooling are plentiful. A further requirement is for these embedded systems to be always on and ready to respond even in the absence of a network connection to the cloud. This combination of factors calls for a change in the way that hardware is designed.
Let’s look at some of the main classes of hardware devices typically used to carry out such computing tasks and analyze the trade-offs associated with each of them:
CPUs
CPUs are about as flexible as a device can be, intended to be a completely general-purpose device. They’re also easy to program. However, this flexibility naturally comes at a cost. The large overhead involved in moving data and instructions around a general-purpose architecture makes CPUs relatively inefficient and power-hungry. As a result CPUs are quickly being left behind in being able to address today’s compute requirements.
From CES and Brian F. in China. I will rewrite it....
MCUs are quickly being left behind in being able to address today’s compute requirements.
Designers have therefore chosen to look at other architectures to supplement this generalized functionality.
GPUs
Another route, depending on the task required, is to look at a graphics processing unit (GPU) to solve the problem. GPUs came into their own from the 90s onwards, where they were generally used to aid CPUs in PCs with graphical processing tasks (for which they are architecturally optimized). In fact, GPUs, with their many compute cores and ‘seas of ALUs’, can be used to accelerate many different types of highly parallelized functions. However, the trade-off is an inability to perform generalist compute tasks along with being relatively power-hungry.
ASICs
At the furthest end of the solution spectrum are ASICs. Manufactured specifically to support their target application, ASICs can be designed to waste zero time or energy on anything else. However, the design and manufacturing of an ASIC, as most designers will attest, is expensive, involves high commitment to a limited number of functions, and offers almost no capacity for more generalized compute or adaptation for other uses after the fact.
A huge proportion of our customers are already at this stage — designing high-performance ASICs (as the only means of addressing the intense compute requirements they face). Yet even here, many of the customers that speak to us are already having to think about alternate approaches that might allow them to produce higher-performing devices at a lower overall cost, as well as integrating a degree of functional flexibility.
So what are the alternatives?
FPGAs
There is another way. FPGAs can offer flexibility close to that of a CPU with the efficiency approaching that of an ASIC. Like ASICs, FPGAs allow the designer to implement the algorithm in logic, delivering huge parallelism and a hardware-optimized solution. Unlike ASICs, FPGAs can be reprogrammed with a new design in the blink of an eye. Compared to CPUs or GPUs, today’s FPGAs are extremely power efficient, able to provide many more operations per watt than processor-based solutions.
But there is an even more attractive solution.
Speedcore eFPGA IP
Achronix has taken things a step further. Rather than simply advocating the use of a discrete FPGA, why not bring that architecture on-board your CPU or SoC and still enjoy further increase in performance?
An eFPGA removes the need to communicate chip-to-chip through bandwidth-limited connections such as PCI-Express and the need for data to be serialized and de-serialized, plus provides an extremely large number of on-chip interconnects to the FPGA fabric — resulting in higher SoC system performance, lower power, reduced die size and overall lower system cost compared to discrete-chip FPGAs.
Achronix’s Speedcore™ eFPGA IP can be integration into ASICs and SoCs to provide a customized programmable fabric. Customers specify their logic, memory and DSP resource needs, then Achronix configures the Speedcore IP to meet their individual requirements. Speedcore look-up-tables (LUTs), RAM blocks and DSP64 blocks can be assembled like building blocks to create the optimal programmable fabric for any given application. Speedcore eFGPAs are currently in production on TSMC’s 16nm process (and in development on TSMC 7nm). Speedcore eFPGAs are supported by the silicon-proven Achronix ACE design tools.
On top of several other benefits, a Speedcore eFPGA solution can offer cache-coherency, share memory resources for faster load-in and load-out, and can reconfigure its entire architecture within 2ms per 100,000 lookup tables.
Existing solutions such as multi-core CPUs, GPGPU and standalone FPGAs can be used to support advanced AI algorithms such as deep learning, but they are poorly positioned to handle the increased demands developers are placing on hardware as their machine-learning architectures evolve. The Achronix Speedcore eFPGA is based upon proven technology and can offer designers a route to faster, smaller, cheaper and more power-efficient solutions, allowing designers to continue to increase their compute in line with rapidly-escalating market requirements.
Commentry: Make sure to read the Kevin Morris item also.
1. precious QUIK $$ resources are being spent for a dedicated eFPGA software tools team. They will stay on it and improve the tools real time.
Nice.
2. This article separate the eFPGA players; Achronyx and QUIK do NOT compete at this time. That shows in the fact that we are on 22FDX and they are on Finfet.
BUT much of the reasons why are THE SAME.
this article is a nice FAQ for efpga...
so if you are a part owner of this business read it a few times. thnks
January 23, 2018
eFPGAs Go Mainstream
After Decades of “Why Not?”
by Kevin Morris
https://www.eejournal.com/article/efpgas-go-mainstream/
January 23, 2018
eFPGAs Go Mainstream
After Decades of “Why Not?”
by Kevin Morris
For decades, the idea of embedded FPGA fabric has been hanging around the industry like a comic sidekick – providing entertaining conversation, but never really taking part in the plot. The concept seemed solid enough on paper. Put some LUT fabric on your ASIC along with the other stuff and you get additional flexibility, maybe avoiding the almost-inevitable need to park an expensive FPGA right next to your ASIC when your chip lands on a board. LUTs are not rocket science, and adding some programmable logic to a design should be a pretty simple proposition – from a hardware design perspective, at least.
Unfortunately, actually making productive use of that embedded FPGA fabric was a much scarier proposition. The big FPGA companies have made an enormous investment in design tools that smoothly take your RTL and crunch it into a working bitstream that can program their devices. The companies who were offering embedded FPGA IP for ASIC design had minimal tools at best, and most chip design teams were highly reluctant to give up a bunch of silicon real estate on their device for something that might or might not be useful.
Now, all that seems to have changed. A number of companies have entered the eFPGA fray, and, from all appearances, the concept is getting traction. Every vendor we talked to reports major design wins, and a confluence of several technical and market factors seems to have suddenly paved the road for rapid growth in eFPGA adoption.
There are at least five vendors offering eFPGA technology at this point – Menta, Flex Logix, Achronix, QuickLogic, and ADICSYS. Interestingly, these companies cannot really be considered “competitors” with each other because each one (at this point) seems to be focusing on a particular market segment or application area. It would be surprising if there were many situations where a design team was evaluating more than one of these for a particular project.
Two of the current suppliers, Achronix and QuickLogic, also sell FPGAs. That means they both have years (or even decades) of development and experience supporting robust FPGA design tool suites. Both companies’ tool suites are well regarded by their FPGA customers, and that should carry over into their eFPGA offerings. The two companies’ target markets are at opposite ends of the spectrum, however.
Achronix is aiming at “high-performance, compute-intensive and real-time processing applications such as AI, machine learning, 5G wireless, networking, and automotive” with their Speedcore eFPGA IP. Achronix has a core generator that creates custom-configured IP blocks with the size and capabilities required for your application. Their ACE design tool suite is used to program the custom block. Achronix claims significant benefits for using embedded (versus stand-alone) FPGAs, with power savings (dynamic plus static) estimated at over 50%, latencies reduced by an order of magnitude, considerably lower system cost, and reduced board size and complexity. Most of these savings are a result of eliminating the 2 sets of high-speed IOs that are required to connect an ASIC/SoC to a conventional FPGA. Speedcore is available on TSMC 16FF+ and is in development on TSMC 7nm.
Achronix can build embedded arrays of “any size” that include your desired mix of blocks: logic blocks with 4-input look-up-tables (LUTs), plus integrated wide mux functions and fast adders, logic RAM with up to 4 kb per memory block, block RAM with up to 20 kb per memory block, and DSP64 blocks, where each block has a 18 × 27 multiplier, 64-bit accumulator and 27-bit pre-adder. Obviously, you can build a substantial amount of accelerator or DSP capability on your chip with this technology. Achronix’s business has exploded in the past year since the announcement ofSpeedcore, and the company has locked in numerous design wins.
The QuickLogic ArcticPro eFPGA offering sits on the opposite end of the spectrum. Rather than the hundreds of thousands of LUTs possible with Achronix, QuickLogic offers embedded blocks in the 16×16 up to 64×64 LUT range. Targeting mobile/consumer-class designs, QuickLogic is aiming at IoT edge applications such as wearables, and their eFPGA is going for the attention of the microwatt crowd. QuickLogic supports the larger geometries popular in consumer-grade SoCs such as 65nm and 40nm processes from GLOBALFOUNDRIES and SMIC, and now they are designing for the 22nm process.
so if you are a part owner of this business read it a few times. thnks
January 23, 2018
eFPGAs Go Mainstream
After Decades of “Why Not?”
by Kevin Morris
https://www.eejournal.com/article/efpgas-go-mainstream/
January 23, 2018
eFPGAs Go Mainstream
After Decades of “Why Not?”
by Kevin Morris
For decades, the idea of embedded FPGA fabric has been hanging around the industry like a comic sidekick – providing entertaining conversation, but never really taking part in the plot. The concept seemed solid enough on paper. Put some LUT fabric on your ASIC along with the other stuff and you get additional flexibility, maybe avoiding the almost-inevitable need to park an expensive FPGA right next to your ASIC when your chip lands on a board. LUTs are not rocket science, and adding some programmable logic to a design should be a pretty simple proposition – from a hardware design perspective, at least.
Unfortunately, actually making productive use of that embedded FPGA fabric was a much scarier proposition. The big FPGA companies have made an enormous investment in design tools that smoothly take your RTL and crunch it into a working bitstream that can program their devices. The companies who were offering embedded FPGA IP for ASIC design had minimal tools at best, and most chip design teams were highly reluctant to give up a bunch of silicon real estate on their device for something that might or might not be useful.
Now, all that seems to have changed. A number of companies have entered the eFPGA fray, and, from all appearances, the concept is getting traction. Every vendor we talked to reports major design wins, and a confluence of several technical and market factors seems to have suddenly paved the road for rapid growth in eFPGA adoption.
There are at least five vendors offering eFPGA technology at this point – Menta, Flex Logix, Achronix, QuickLogic, and ADICSYS. Interestingly, these companies cannot really be considered “competitors” with each other because each one (at this point) seems to be focusing on a particular market segment or application area. It would be surprising if there were many situations where a design team was evaluating more than one of these for a particular project.
Two of the current suppliers, Achronix and QuickLogic, also sell FPGAs. That means they both have years (or even decades) of development and experience supporting robust FPGA design tool suites. Both companies’ tool suites are well regarded by their FPGA customers, and that should carry over into their eFPGA offerings. The two companies’ target markets are at opposite ends of the spectrum, however.
Achronix is aiming at “high-performance, compute-intensive and real-time processing applications such as AI, machine learning, 5G wireless, networking, and automotive” with their Speedcore eFPGA IP. Achronix has a core generator that creates custom-configured IP blocks with the size and capabilities required for your application. Their ACE design tool suite is used to program the custom block. Achronix claims significant benefits for using embedded (versus stand-alone) FPGAs, with power savings (dynamic plus static) estimated at over 50%, latencies reduced by an order of magnitude, considerably lower system cost, and reduced board size and complexity. Most of these savings are a result of eliminating the 2 sets of high-speed IOs that are required to connect an ASIC/SoC to a conventional FPGA. Speedcore is available on TSMC 16FF+ and is in development on TSMC 7nm.
Achronix can build embedded arrays of “any size” that include your desired mix of blocks: logic blocks with 4-input look-up-tables (LUTs), plus integrated wide mux functions and fast adders, logic RAM with up to 4 kb per memory block, block RAM with up to 20 kb per memory block, and DSP64 blocks, where each block has a 18 × 27 multiplier, 64-bit accumulator and 27-bit pre-adder. Obviously, you can build a substantial amount of accelerator or DSP capability on your chip with this technology. Achronix’s business has exploded in the past year since the announcement ofSpeedcore, and the company has locked in numerous design wins.
The QuickLogic ArcticPro eFPGA offering sits on the opposite end of the spectrum. Rather than the hundreds of thousands of LUTs possible with Achronix, QuickLogic offers embedded blocks in the 16×16 up to 64×64 LUT range. Targeting mobile/consumer-class designs, QuickLogic is aiming at IoT edge applications such as wearables, and their eFPGA is going for the attention of the microwatt crowd. QuickLogic supports the larger geometries popular in consumer-grade SoCs such as 65nm and 40nm processes from GLOBALFOUNDRIES and SMIC, and now they are designing for the 22nm process.
Wednesday, January 24, 2018
TENCENT SOFTWARE BEATS GO CHAMP, SHOWING CHINA'S AI GAINS
Ma Huateng, chairman and CEO of Tencent Holdings Ltd.
LINTAO ZHANG/GETTY IMAGES
IN MARCH 2016, Alphabet’s DeepMind research group set a milestone in artificial intelligence when its AlphaGo program defeated professional Go player Lee Sedol, then fifth-ranked in the world, at the complex board game Go.
Now China’s Tencent is claiming a milestone of its own in Go—and China’s ambitions in artificial intelligence. Last week, the company’s Fine Art program defeated China’s top professional Ke Jie, despite giving him a significant head start. Ke recently slipped to number two in the world, after holding the top spot for three years.
Fine Art’s victory won notice in the world of Go because it helps illustrate the gulf that has opened between human and machine players of the complex boardgame.
But it also highlights a shrinking gulf—between AI capabilities in the US and China. In a detailed national strategy for AI released last summer, China set a goal of drawing level with America by 2020, and pulling ahead by 2030. Central, state, and municipal governments are directing money towards AI research and companies.
Tencent, whose offerings span from messaging to payments and music, was named to a “national team” for AI by China’s Ministry of Science and Technology in November, alongside four other tech giants. Greg Allen, an adjunct fellow at the Center for a New American Security, says the company’s Go program shows the US should take China’s technological ambitions seriously. “Fine Art is yet more proof of the stunning progress China has made in AI technology,” he says.
China’s big AI push was partly spurred by AlphaGo’s victory in 2016. Professors who advised the Chinese government on the AI plan told the New York Times that Alphabet’s achievement was a “Sputnik moment” in which officials realized they lagged the US in a technology with broad commercial and military applications.
Go was invented in China more than 3,000 years ago, and is still viewed as an important part of Chinese cultural heritage. Players take turns placing stones on a 19-by-19 grid in a battle for territory that is many times more complex than chess.
Handicaps are used to level the playing field between people of different skill levels. Tencent’s Fine Art defeated Ke Jie despite giving the one-time world champion a two-stone head start. That suggests the program is in a different league than the best humans, not just slightly better.
Ingo Althöfer, a math professor and Go expert at Friedrich Schiller University of Jena in Germany, says that it has generally been held that a perfect “Go God” could beat the best human with a three-stone handicap. “Fine Art is trying to reach this limit of perfect play,” he says. Althöfer calls Ke Jie “likely the best human player currently.” DeepMind has so far ignored calls for AlphaGo to play handicapped games in public, Althöfer says.
Alphabet’s use of the game to demonstrate the might of its AI muscle rankled some Chinese officials. Google took AlphaGo to China for a “Future of Go Summit” last summer, with the main event a match in which the software defeated Ke Jie. Chinese state television reversed plans to cover the match shortly before it began, and local internet providers blocked Chinese-language broadcasts half an hour after the match started.
Tencent created Fine Art in 2016, and has previously said the software has beaten several professionals, including Ke Jie. The company says the latest, upgraded version played a series of handicapped games against professionals starting on Jan. 9. The match against the 20-year-old Ke Jie on Jan. 17 was the capstone. Fine Art still isn’t perfect, though. The International Go Federation reports that Fine Art played 34 games against professionals given a two-stone handicap, and won 30.
Those results, like China’s rapid advance in AI, came with an assist from Alphabet and other US companies. Tencent says the latest version of Fine Art drew inspiration from a paper by DeepMind last year about an improved version of AlphaGo called AlphaGo Zero. Alphabet, Microsoft, Facebook, and many other US companies have helped stoke the worldwide uptick of interest in AI by publishing research papers and releasing software packages.
Althöfer is now hoping Tencent and Alphabet will agree to the ultimate Go showdown: Fine Art versus AlphaGo.
China's AI Ascent
- Some US politicians argue restricting Chinese investments would slow the country's advances in AI—it wouldn't work.
- China's roads will open to self-driving vehicles before America's do, says Chinese search engine Baidu.
- Government officials suppressed coverage of Alphabet's software AlphaGo defeating China's top Go player, Ke Jie last summer.
GOOG may be sorry it decided to play go?
this is amazing.
Sunday, January 21, 2018
Main agent
DoCoMo provides service providers and manufacturers with the foundation of AI agents so that
each company can freely create their favorite characters without developing their own systems from scratch.
Development partner company
i will track this along...including this snip...
In addition, the telecom trio will test various services and discover services through which they can cooperate with one another by sharing various AI speech recognition application programming interfaces (APIs).
NTT, KT, China mobile( China Mobile is the largest mobile telecommunications corporation by market capitalization,[7] and also the world's largest mobile phone operatorby total number of subscribers, with over 873 million subscribers as of August 2017.[8])
DoCoMo provides service providers and manufacturers with the foundation of AI agents so that
each company can freely create their favorite characters without developing their own systems from scratch.
Development partner company
Details
Details
Details
Details
Details
Details
Details- Quik, can you get a foot in the door for this very solid platform?
i will track this along...including this snip...
In addition, the telecom trio will test various services and discover services through which they can cooperate with one another by sharing various AI speech recognition application programming interfaces (APIs).
NTT, KT, China mobile( China Mobile is the largest mobile telecommunications corporation by market capitalization,[7] and also the world's largest mobile phone operatorby total number of subscribers, with over 873 million subscribers as of August 2017.[8])
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